Description:
Subtracts two registers and subtracts with the C flag and places the result in the destination register Rd.
Operation:
(i) Rd ← Rd - Rr - C
Syntax: Operands: Program Counter:
(i) SBC Rd,Rr 0 ≤ d ≤ 31, 0 ≤ r ≤ 31 PC ← PC + 1
16-bit Opcode:
|
0000 |
10rd |
dddd |
rrrr |
Status Register and Boolean Formula:
|
I |
T |
H |
S |
V |
N |
Z |
C |
|---|---|---|---|---|---|---|---|
|
- |
- |
⇔ |
⇔ |
⇔ |
⇔ |
⇔ |
⇔ |
H:
Set if there was a borrow from bit 3; cleared otherwise
S: N ⊕ V, For signed tests.
V:
Set if two's complement overflow resulted from the operation; cleared otherwise.
N:R7
Set if MSB of the result is set; cleared otherwise.
Z:
Previous value remains unchanged when the result is zero; cleared otherwise.
C:
Set if the absolute value of the contents of Rr plus previous carry is larger than the absolute value of the Rd; cleared otherwise.
R (Result) equals Rd after the operation.
Example:
; Subtract r1:r0 from r3:r2 sub r2,r0 ; Subtract low byte sbc r3,r1 ; Subtract with carry high byte
Words: 1 (2 bytes)
Cycles: 1


